COMPUTER FUNDAMENTALS

INTRODUCTION TO COMPUTERS

History of computer:-

1. 1^st computing device = ABACUS – BC 500 in Babylonians.

2. 1^st mechanical computer (Analytical Engine) – 1822 Charles Babbage

3. The ENIAC used 18000 vacuum tubes in 1942.

Generation of Computers:-

1^st Generation - Vacuum tubes
2^nd Generation – Transistors
3^rd Generation – Integrated Circuits
4^th Generation – VLSI (Very Large Scale Integration)
5^th Generation – Artificial intelligence.

Classification of IC’s:-

small scale integration(SSI) – 10 to 100 components
Medium scale integration (MSI) – 100 to 1000 components
Large scale integration (LSI) – 1000 TO 10 000 components
Very large scale integration (VLSI) – 10 000 and above

BLOCK DIAGRAM OF COMPUTER

INPUT DEVICES

These devices are used for feeding data, programs and commands to the computer.

Eg. Keyboard, mouse, joystick, light pen, scanner, webcam and all storage devices.

OUTPUT DEVICES

Those devices which are used for capturing or displaying the results are called out put devices.

Eg. Monitor, Printer, Plotter, speaker and storage devices.

MEMORY

Memory is the place where the current programs, related data and results are stored temporarily. Current programs are loaded into the memory from the input devices and the results which are stored inside the memory after processing temporarily. Once a full result is obtained, it will be sent to the output devices.

MICROPROCESSOR

All the electronics circuits which are needed for making ALU & Control unit are collectively called CPU (Central Processing Unit). If all the circuits needed for the CPU are coming integrated in a single chip, it is called a micro processor.

FUNCTIONAL CLASSIFICATION OF COMPUTERS

Functionally computers can be classified in to four. They are

Hardware – Physical components or touchable parts of a computer
Software – Written programs
Firmware – Combination of hardware and software or Software embedded in hardware
Live ware – User

SOFTWARE

COMMUNICATION LAYERS OF COMPUTER

BIOS (Basic Input Output System)

Bios in ROM contains programs which initializes various LSI chips on the mother board for performing IO(input / output) operations. These programs can be accessed by OS or by application programs whenever an IO operation to be performed. In PC’s BIOS

comes with mother board as firmware. So, BIOS is an interface between hardware and software.

OPERATING SYSTEM

OS is an organized collection of software that controls the overall operation of the computer. It does the following operations:-

1. CPU management

2. Memory management

3. I/O management

4. Storage device management

5. User interface.

APPLICATION PROGRAMS

Application programs are special programs which are meant for operating computer in a special application.

E.g. MS word, Excel, Power point, tally, AutoCAD, Photoshop etc.

Computer (Definition)

Computer is an electronic device, which processes alphanumeric data’s with the help of instructions defined in the program.

Data

Any piece of information given into the computer for processing is called data.

Instruction

It is the single step to be done by computer.

Program

A group of instructions which are needed for operating the computer in a specific task is called a program.

Hardware

All tangible and visible parts of computer are called hardware.

Eg. Ic, capacitors, resistors, cables, pcb (Printed circuit board) etc.

Software

All intangible and invisible parts of computers, which are essential for the working of computer are called software.

Eg. Os, application programs, device drivers etc.

DOS INTERNAL COMMANDS

1. dir – list the contents of the directory.
            dir/p - to show the directory page by page
            dir/w - to show the directory widthwise.
             dir/ah - to show the hidden files

dir /s - to show the contents of sub-directories also.

Dir <filename> - to search for a file in the present directory.

Dir <drive>: - to show the content of the <drive>: drive.

cls - to clear the screen

copy - to copy the source files to destination folder.
copy <source file or files> <destination directory>
copy file1.exe dir3

ren or rename - it is used to rename a file
ren <existing name of the file> <new name of thefile>

del or erase – it is used to delete a file or a group of files
del <file name>

cd - to change the directory
cd <directory name> - to change to the directory
cd.. – to go back to parent directory.
cd\ - to go back to root directory

mkdir - to make a blank directory
mkdir <dir name>

copy con – to create a text file
copy con <file name>
<type the matter>
ctrl + z

rd - to remove a blank directory
rd <blank directory>

type <text filename> - to show the content of a text file
type <filename> | more - to show the content of a long text file page by page.

ver - to show the version of O.S

<drive>: - to change the prompt to another drive.

path - To set or to show the system path.
System path contains directories in which dos has to search for the files, which are required for the execution of the external commands.

Speed of CD Drive

Normally CDD speeds are mentioned as:-

32x = 32 * 150 kbps = 4800kbps

Where ‘x’ is 150 Kbps

CD R/W speed

52 x 24 x 52

First 52 stand for the speed of CDR

Second 24 stands for the speed of CD R/W

Third 52 stands for reading speed of all CD’s.

DVD specification

Normally DVD speed is mentioned as:-

12X

Where X is = 1350kbps

COMBO DRIVE = CD ROM + CD R + CD R/W + CD writing + DVD read

DVD writer = COMBO + DVD writing

CD STANDARDS

The standards of CD’s are commonly known by the color of the books that describe them. There exists the following standards:-

Red book – Audio CD
Yellow book – Data CD
Green book – Interactive CD
Blue book – Multi session CD
White book – VCD
Orange book – CD-R, CD-R/W

FILE SYSTEM

File system is a set of program, which organize, retrieves, maintains and secure files stored in storage devices.

Types of file systems:-

Following types of file systems are available:-

FAT (FAT 16)
VFAT (Virtual FAT)
FAT 32
NTFS

FAT

Maximum partition size = 2GB

Maximum Files in root directory = 512 Nos.

Maximum files in non-root directory = 65,535 Nos.

File name 8.3 pattern

Below 50mb FAT 12.

VFAT

Maximum partition size = 4 GB

LFN (Long File Name) support = Yes

FAT 32

Partition size = 4TB

LFN = yes

NTFS (New Technology File System)

Maximum partition size = 16 Hexabyte

File level security = yes

Local security = yes

POSIX support = yes (Case sensitivity)

File level compression = Yes

CLUSTER

Minimum space allocated for a new file within the drive.

HARDDISK DRIVE

This is the secondary storage medium. This comes in different size and capacity.

Size

5 ¼” (Desktop HDD)

3 ½” (Laptop HDD)

Capacity

2GB, 4GB, 17GB, 20GB, 40GB, 80GB, 120GB, 160GB, 200GB etc.

Parts of HDD

Disk Platter
Read / Write Head
Head arm
Head Actuator Mechanism
Spindle Motor
Logic Baord
Air Filter
Bezel
Cable and connector

Cylinder

• Combination of tracks through all platters

• A single movement of the read/write head arms can read all the platters of data

Disk Platter

This platter is made up of aluminum or glass ceramic material (Memcore) and

coated with magnetic oxide in which data is stored in the form of its,depending upon the capacity of the disk the number of platter increases or decreases.

Spindle Motor

In this motor where hard disk is placed and the speed of this motor is the entire hard disk speed.The hard desktop disk runs at a speed of 7200rpm and laptop hard disk rotates at a speed of 12000rpm

Stepper Motor

This motor is the important cause for the movement of the read/write head,the movement of this motor which make the head to move track by track on the platter.This motor is fixed on the above of this motor the platter is fixed.

IDE interface

Hard Drive Operation

Voice Coil Mechanism

The voice coil actuators used in virtually in all hard disk today, this uses a feed back signal from the drive to accurately determine the head position and adjust them. There is an important difference between the stepper motor and voice coil method is moving the heads on the tracks. In the first case, the motion is in steps, with the size of its gear arrangement .The heads can be positioned to any cylinder just by passing an appropriately varying current through the voice coil for exactly the ight amount of time. To make sure that the current is supplied in the exactly the right way, the control circuitry uses a negative feedback also called as servo feedback.

Write Precompensation

The hard disk drive spins at a constant rate.This known as constant angular velocity. Although constant rotation needs a very simple motor circuit. Tracks closer to the spindle are physically shorter than the tracks towadrs the platter’s edge. Shorter tracks result in the shorter sectors. For inner sectors to hold the same amount of data as outer sctors, data must be packed more densly on the inner sector each magnetic flux reversal is close together. Unfortunately, samller flux reversal produce weaker magnetic fields in the R/W heads during reading.If the inner field is written with a stronger magnetic field,flux transition stored in the media will be stronger. The use of increased writing current to compensate for diminished disk response is known as WRITE PRECOMPENSATION.

Landing Zone

The R/W heads of a hard drive fly within the microinchesof their respective platter surface-held aloft with air currents produced by the spnning platters.When the plater is turned off,however the platter slow to a halt.During this spindown period air flow falls rapidly and heads can liteally “crash” into the platter surface.Whenever the head touches a platter surface the data can be destroyed.Even during normal operation,a sudden shock or dump can cause one or more heads to skid across their surface.Although a drive can be reformatted after a head crash ,data and programes would have to be reloaded from scratch .To avoid head crash during normal spin down, a cylinder is reversed as a landing zone .No data is stored in the landing zone so any surface problem caused by the head landing is harmless.Virtually all hard disk drive automatially move the head assembly over the landing zone before spindown,then gently

lock the heads into place until power is restored.

HDD interfaces

HDD Jumper settings

Formatting

Proper setup and formatting are critical to a drive's performance and reliability
The three major steps in the formatting process for a hard disk drive subsystem are as follows:

•Low-level formatting

•Partitioning

•High-level formatting

Low-Level Formatting

All new hard disk drives are low-level formatted by the manufacturer, and you do not have to perform another LLF before you install the drive.Many people say, for example, that you can't perform a low-level format on an ATA drive, and that if you do, you will destroy the drive. This statement is untrue! What can happen with some of the earliest ATA drives is that you might lose the optimal head and cylinder skew factors that were set by the manufacturer for the drive, as well as the map of drive defects. This can have a negative effect on the drive's performance, but you can still reliably use the drive

Drive Partitioning

Partitioning a hard disk is the act of defining areas of the disk for an operating system to use as a volume.

When you partition a disk, the partitioning software writes a master partition boot sector at Cylinder 0, Head 0, Sector 1the first sector on the hard disk. This sector contains data that describes the partitions by their starting and ending cylinder, head, and sector locations. The partition table also indicates to the ROM BIOS which of the partitions is bootable and, therefore, where to look for an operating system to load

The FDISK program is the accepted standard for partitioning hard disk drives for use with all operating systems up through Windows Me. Windows 2000 and XP use a similar command-line program called DISKPART, or you can partition and format hard disks with the Disk Management

With any version of Windowsas with MS-DOS FDISK or other disk preparation tools enable you to create two types of disk partitions: primary and extended. A primary partition can be bootable but an extended partition can't. If you have only a single hard disk in your system, at least part of the drive must be prepared as a primary partition if you want to start your computer from the hard disk

A primary partition is seen as a single volume or drive letter (C: on one-drive systems), whereas an extended partition acts as a sort of logical container for additional volumes (drive letters D: and beyond). A single extended partition can contain a single volume (also referred to by FDISK as a logical DOS drive) or several volumes (logical DOS drives) of various sizes

Another reason for subdividing a single drive into multiple volumes is increased data security. For example, PowerQuest (the creator of PartitionMagic) suggests a three-volume partitioning scheme that looks like this:

•C: for the operating system and utilities

•D: for applications

•E: and above for data

High-Level (Operating System) Formatting

The final step in the installation of a hard disk drive is the high-level format. Similar to the partitioning process, the high-level format is specific to the file system you've chosen to use on the drive. On Windows 9x and DOS systems, the primary function of the high-level format is to create a FAT and a directory system on the disk so the operating system can manage files

The FAT high-level format program performs the following functions and procedures

•1. Scans the disk (read-only) for tracks and sectors marked as bad during the LLF, and notes these tracks as being unreadable.

•2. Returns the drive heads to the first cylinder of the partition, and at that cylinder (Head 1, Sector 1) writes a DOS volume boot sector.

•3. Writes a FAT at Head 1, Sector 2. Immediately after this FAT, it writes a second copy of the FAT. These FATs are essentially blank except for bad-cluster marks noting areas of the disk that were found to be unreadable during the marked-defect scan.

•4.Writes a blank root directory.

•5. If the /S parameter is specified, copies the system files, IO.SYS and MSDOS.SYS (or IBMBIO.COM and IBMDOS.COM, depending on which DOS you run), and COMMAND.COM to the disk (in that order).

•6. If the /V parameter is specified, prompts the user for a volume label, which is written as the fourth file entry in the root directory.

Now, the operating system can use the disk for storing and retrieving files, and the disk is a bootable disk.

IDE STANDARS

(Integrated Drive Electronics)

There have been four main types of IDE interface based on three base standards:-

Serial AT Attachment (ATA)
Parallel AT attachment (ATA based on the 16 bit AT bus, also called ISA).
XT IDE (based on 8 bit ISA, obsolete).
MCA IDE (based on 16 bit micro channel, absolete).

The newer versions of parallel ATA are refered to as ATA-2 and higher. They are also sometimes called as EIDE (Enhanced IDE), Fast ATA, Ultra ATA, or Ultra DMA.

Parallel ATA standards:-

ATA – 1
ATA -2 (also called fast ATA, fast ATA-2, or EIDE.
ATA – 3
ATA – 4 (Ultra ATA 33)
ATA – 5 (Ultra ATA 66)
ATA – 6 (Ultra ATA 100)
ATA – 7 (Ultra ATA 133 or SATA (serial ATA)
ATA – 8 (ULtra ATA 166 or SATA

HARD DISK GEOMETRY

LBA (Logical Block Addressing)

It is special mode used by the BIOS for accessing the high capacity drivers. In this method, the no. of cylinders are divided by a fixed number and the no. of heads are multiplied by the same number. Earlier bios uses 10 bits for addressing cylinders and 8 bits for addressing heads. So, maximum no. of cylinders were 1024 and no. of heads were 256. by using LBA method, we can connect a HDD with more than 1024 cylinders.

ZONE BIT RECORDING

In earlier hdd’s number of sectors per cylinder was constant. So, the data in inner sectors were tightly written. But in outer most sectors it was loosely packed. This reduces the data storage capacity. Modern hdd’s uses a feature called ZBR to compensate this. In ZBR total no. of cylinders are divided into different zones and each zone contains fixed no. of sectors. This increases the data storage capacity of hdd.

SMART (Self Monitoring Analyzing and Reporting Technology)

If this feature is enabled, all the major events happening inside the hdd are monitored, analyzed and a warning will be given in advance if any problems which are likely to be happened in the near future.

BUSMASTERING DMA

In present day HDD’s contains built-in DMA controller. It is mainly used for mass quantity of memory transfer to the system. This feature is called bus mastering DMA.

SMALL COMPUTER SYSTEM INTERFACE (SCSI)

Small computer system interface, an ANSI standard, is a parallel interface standard, used by apple macintosh computer PC’s and manay Unix systems for attaching peripherals device to computers. SCSI interface provide for faster data transfer rates than standard serial and parallel ports. In addition, lyou can attach many devices to a single SCSI port.

SCSI standards are:-

Scsi version	Signaling rate MHZ	Bus width(bits)	Max data transfer MHZ	Maximum devices	Maximum cable length meters	Details /additional information
Scsi-1	5	8	5	7	6	8 bit bus and data rate of 5mbps 1986, 50 pin cable
Scsi-2	5	8	5	7	6	Same as above, 50 pin cable
Wide scsi	5	16	10	15	6	Use 68 pin cable. 16 bit bus.
Fast scsi	10	8	10	7	6	8bit bus, 10mbps speed 1990
Fast wide scsi	10	16	20	15	6	20mbps speed 16 bit bus1992
Ultra scsi	20	8	20	7	1.5	8bit bus 20 mbps data speed
Ultra scsi-2	20	16	40	7	12	Also called ultra wide scsi 1994
Ultra 2 scsi	40	16	80	15	12	Using 16 bit bus for data speed of 80mbps
Ultra 160 scsi	80	16	160	15	12	Also called wide ultra scsi

RAM

The level of satisfaction you have with your PC depends on the amount of RAM it has. Even if the processor is the fastest or the hard drive the best and quickest around, you just won’t get the performance you’re looking for without the right type and amount of RAM. So, it’s important for you to understand the various types of RAM starting from the earlier EDO to the current SDRAM and the future RDRAM. This will help you decide which RAM to buy for your PC.

Memory Types

For a computer to work, the CPU must take program instructions and exchange data directly

with memory. As a consequence, memory must keep pace with the CPU (or make the CPU wait

for it to catch up). Now that processors are so incredibly fast (and getting faster), traditional

memory architectures are being replaced by specialized memory devices that have been tailored

to serve specific functions in the PC. As one upgrades and repair various systems, one will

undoubtedly encounter some of the following memory designations

DRAM (Dynamic Random-Access Memory)

This remains the most recognized and common form of computer memory. DRAM achieves a

good mix of speed and density, while being relatively simple and inexpensive to produce—only

a single transistor and capacitor is needed to hold a bit. Unfortunately, DRAM contents must be

refreshed every few milliseconds or the contents of each bit location will decay. DRAM

performance is also limited because of relatively long access times. Today, many video boards

are using DRAM SIMMs to supply video memory.

SRAM (Static Random-Access Memory)

The SRAM is also a classic memory design—it is even older than DRAM. SRAM does not

require regular refresh operations, and can be made to operate at access speeds that are much

faster than DRAM. However, SRAM uses six transistors (or more) to hold a single bit. This

reduces the density of SRAM and increases power demands (which is why SRAM was never

adopted for general PC use in the first place). Still, the high speed of SRAM has earned it a place

as the PC’s L2 (or external) cache.

SRAM Types -Three types of cache

• Level 1 (L1)

– Primary or internal cache

– Built directly into the processor chip

– Small capacity

• Level 2 (L2)

– External cache

– Much larger capacity, but slower

• Level 3 ( L3)

- It control data transfer between RAM and Processor

Internal Cache(L1)

The Pentium has two separate internal caches,they are code

cache and data cache.Each code and data has the size of

8KB.The cahe controllerand the cache memory are embedded in

the CPU chip itself.The cache mirrors the inrformation the

normal RAM by keeping a copy of data and code from different

memory location.

External Cache (L2)

System based on Pentium can benefit from secondary processor

cache(L2)which usually consist of up to 512KBor more extremely

fast .When the CPU fetches the data that are not already available

in its internal cache, it has to wait till data are provided from

DRAM.If the data already in the secondary processor the CPU can

go ahead with its processing work without wait state.

DRAM Types

• FPM

• EDO

• SDRAM

• RDRAM

• DDR

FPM DRAM (Fast-Page Mode DRAM)

This is a popular twist on conventional DRAM. Typical DRAM access

is accomplished in a fashion similar to reading from a book—a

memory “page” is accessed first, then the contents of that “page” can

be located. The problem is that every access requires the DRAM to

re-locate the “page.” Fast-page mode operation overcomes this

delay by allowing the CPU to access multiple pieces of data on the

same “page” without having to “re-locate” the “page” every time—as

long as the subsequent read or write cycle is on the previously

located “page,” the FPDRAM can access the specific location on that

“page” directly.

EDO RAM (Extended Data Output RAM)

EDO RAM is a relatively well-established variation to DRAM, which

extends the time that output data is valid—thus the word’s presence

on the data bus is “extended.” This is accomplished by modifying the

DRAM’s output buffer, which prolongs the time where read data is

valid. The data will remain valid until a motherboard signal is received

to release it. This eases timing constraints on the memory and allows

a 15 to 30% improvement in memory performance with little real

increase in cost. Because a new external signal is needed to operate

EDO RAM, the motherboard must use a chipset designed to

accommodate EDO. Intel’s Triton chipset was one of the first to

support EDO. Although now most chipsets (and most current

motherboards) currently support EDO. EDO RAM can be used in non-

EDO motherboards, but there will be no performance improvement

SDRAM (Synchronous or Synchronized DRAM

Typical memory can only transfer data during certain portions of a clock

cycle. The SDRAM modifies memory operation so that outputs can be valid

at any point in the clock cycle. By itself, this is not really significant, but

SDRAM also provides a “pipeline burst” mode that allows a second access

to begin before the current access is complete. This “continuous” memory

access offers effective access speeds as fast as 10 ns, and can transfer

data at up to 100MB/s. SDRAM is becoming quite popular on current

motherboard designs, and is supported by the Intel VX chipset, and VIA

580VP, 590VP, and 680VP chipsets. Like BEDO, SDRAM can transfer data

in a 5-1-1-1 pattern, but it can support motherboard speeds up to 100MHz,

which is ideal for the 75MHz and 82MHz motherboards now becoming so

vital for Pentium II systems. Check out the following references for more

information on SDRAM.

RDRAM (Rambus DRAM)

Most of the memory alternatives so far have been variations of the same

basic architecture. Rambus, Inc. (joint developers of EDRAM) has created a

new memory architecture called the Rambus Channel. A CPU or specialized

IC is used as the “master” device and the RDRAMs are used as “slave”

devices. Data is then sent back and forth across the Rambus channel in 256-

byte blocks. With a dual 250MHz clock, the Rambus Channel can transfer

data based on the timing of both clocks—this results in data-transfer rates

approaching 500MB/s (roughly equivalent to 2-ns access time).

The problem with RDRAM is that a Rambus Channel would require an

extensive re-design to the current PC memory architecture—a move that

most PC makers strenuously resist. As a result, one is most likely to see

RDRAM in high-end, specialized computing systems. Still, as memory

struggles to match the microprocessor, PC makers might yet embrace the

Rambus approach for commercial systems.

DRAM pacakges

• SIMM

• DIMM

• RIMM

Memory Management

The following are the type memory that we are going to discuss in detail:

• Conventional memory

• Upper memory Area

• High Memory Area

• Extended Memory

• Expanded Memory

• Video RAM memory

• Adapter ROM and special purpose RAM

• Motherboard ROM BIOS

Base or Conventional Memory

DOS can read and write the entire mega byte, but can manage the loading of program only in the

portion of first mega byte of RAM space called conventional Memory. Refer to figure 1.

The 8088 processor and its equivalent will be able to address one megabytes of memory with 20-bit

address lines. Out of one mega bytes of memory, 640 KB is used for DOS operating system and

applications, and the remaining 384 KB is reserved for addressing BIOS ROM of motherboard, video adapter board, NIC card, video RAM and etc

Upper Memory Area (UMA)

The address space 384K above conventional memory is called Upper Memory Area.

This memory has the addresses from A0000 through FFFFF. See figure 1.

The first two 64 K blocks of UMA (address range from A0000-BFFFF) after conventional memory are

reserved for video RAM. This space is used for storing video information like text and graphic data, in video

RAM of Display Adapter before it is sent to the monitor screen. The next two 64 K blocks (address range

from C0000-DFFFF) of UMA are reserved for the software programs, or adapter BIOS that is stored in

ROM chip on the adapter plugged into the system slots. Most VGA compatible video adapters use the first

32 K Of this area for their onboard BIOS. The rest can be used for any other adapter plugged into the

slots.

The last two 64 K blocks (address range from E0000-FFFFF) of UMA are used for addressing the

motherboard BIOS program stored in EPROM. This also contains POST (Power On self Test) bootstrap

loader program, which initiate boot process from floppy or hard disk, CD-ROM drive and or from other

drives. The last motherboard BIOS is allotted the address of 64 K (from E0000 – FFFFF).

It is possible to load device drivers and memory resident programs in the unused space of UMA, which

frees up the conventional memory otherwise they would occupy. The amount of free space available in

UMA depends on the adapters plugged into Upper Memory Block (UMB).the system slots. The free space available in UMA.

Extended Memory

The memory beyond first mega bytes that can be accessed through the protected mode of the 80286 and higher

processors is generally called extended memory. Up to 16 Mega bytes of memory in 286 system and 4 Gigabytes

in systems having processor 386 and above. Refer to figure.1

Only protected mode applications can use the extended memory in 286 machines. But with 386 and later

microprocessors virtual 8086 mode allows software to split extended memory into one megabyte or smaller ranges

that each act like base memory of an individual PC.

Running several programs at the same time in virtual real mode, which is termed multitasking requires software

that can manage each program from crashing into one another. Operating systems like Unix and Novell Netware,

can directly access and load their OS Software into the extended memory.

XMS Memory

The Extended Memory Specification specifies how program would use the extended Memory. Several programs

that use XMS memory can operate together under DOS on the same system, switching the processor into and out

of protected mode to access the memory. XMS rules prevent one program from accessing memory that another

program has in use.

Extended memory can be made to conform the XMS specification by installing a device driver in the CONFIG.SYS

High Memory Area (HMA) and the A 20 Lines

The high memory area is an area of 64 K –16 bytes right on top of the first mega Bytes which can be accessed

by 286 and higher processors in real mode whereas 8088 processor cannot access this area. In fact processors

should not access beyond the first mega bytes in real mode.

This is because processors (286 and above) having more than 20 address lines. This happens due to the

(defect) bug present in these processors. That means when the segment and offset addresses are added

together the resultant address spans the extended memory. The extended memory starts from 100000 (Hex).

FFFF0 segment address

FFFF offset address

----------

10FFEF total

----------

If the 21st address line(A 20) of these processors is disabled these CPUs cannot access the HMA area. This can

be done by using unused pins of 8042 keyboard controller on the motherboard to enable and disable A 20

address line with the help of HIMEM.SYS.

Now the bug in these processors turned to be an advantage (feature) by using HMA area for loading DOS kernel

in real mode. This is accomplished simply by first loading an XMS driver such as (HIMEM.SYS).

file. The most common XMS driver is HIMEM.SYS Which is included with latest versions of DOS and Windows

Expanded Memory

Expanded memory is used to meet the demand of the applications, which require more memory

space to run in PC and PC-XT. Expanded memory is located in an adapter board termed as

Memory Expansion Board, which cannot be directly addressable, by processors like conventional

memory and extended memory.

Instead it can only be accessed through small 64 K window established in the unused area of the

Upper Memory Area (usually from D0000-DFFFF). This segment (Window) is divided into 4 pages

of 16 K each. When all the pages are filled one page is swapped into memory in memory

expansion board, the page, which becomes empty can be used for loading required data for

processing from the memory board. Using segment and offset concept, memory manager can

address up to several megabytes in the memory board.

Lotus, Intel and Microsoft developed driver program (LIM EMS) to exploit several mega bytes (32

MB) available in the card by the applications. It is only the way to run large applications, in

systems using an 8088 processor.

Only data can normally be placed in this segment because it is above the area of contiguous

memory (640 K) that DOS can use. For example, a program cannot run while it is swapped out

and therefore not visible by the processor.

ROM BIOS and MEMORY Conflicts

If two adapters have overlapping ROM or RAM address, usually neither board operates properly. Each

board functions if one removes or disable the other on, but they do not work together. With many adapters,

one can change the actual memory location to be used with jumpers, switches, or driver software, which

might be necessary to allow two boards to coexist in one system.

Additionally one must ensure that adapter boards do not use the same IRQ (Interrupt Request Line), DMA

channel (Direct Memory Access), or I/O Port address that lead to conflicts.

ROM Shadowing

In a high-end system reading ROM BIOS and adapter BIOS by either 8-bit or 16 bit at a time will bring down

the performance (bottle neck) of the system. And also the speed of ROM available is very slow (150 to

200ns) comparing to System memory (DRAM/SDRAM with 60,40 ns or less). In 386 and higher systems,

by moving the programming code from slow ROM chips into 32-bit system memory, processors can access

the same code from system memory through 32 or 64 bit bus width and with speedier access.

The shadowing is accomplished by using powerful Memory Management Unit in the 386 and higher

processors. With appropriate instructions, the MMU can take a copy of the ROM code place it in RAM and

enable the RAM chips that it appears to the system at exactly the same addresses where it was originally

located. This actually disables the ROM chips, which are essentially shut down. The system RAM where ROM program resides is fully write protected.

CHAPTER -

MICROPROCESSORS

CENTRAL PROCESSING UNIT

A Central Processing Unit (CPU), or sometimes just called processor, is a description of a class of logic machines that can execute computer programs. This broad definition can easily be applied to many early computers that existed long before the term "CPU" ever came into widespread usage. The term itself and its initialism have been in use in the computer industry at least since the early 1960s.

Discrete transistor and IC CPUs

The first such improvement came with the advent of the transistor. With this improvement more complex and reliable CPUs were built onto one or several printed circuit boards containing discrete (individual) components.The integrated circuit (IC) allowed a large number of transistors to be manufactured on a singlesemiconductor-based die, or "chip."the quantity of individual ICs needed for a complete CPU. MSI and LSI (medium- and large-scale integration) ICs increased transistor counts to hundreds, then thousands.

Microprocessors

Previous generations of CPUs were implemented as discrete components and numerous small integrated circuits (ICs) on one or more circuit boards. Microprocessors, on the other hand, are CPUs manufactured on a very small number of ICs; usually just one.

Advanced Processors

• The processor is the central component of the PC.

• This vital component is responsible for every single thing the PC does.

• It determines, which operating systems can be used, which software packages the PC can run, how much energy the pc uses, and how stable the system will be

• The processor is also a major determinant of overall system cost: the newer and more powerful the processor, the more expensive the machine will be.

Principle of a Microprocessor

• They take signals in the form of 0s and 1s manipulate them according to a set of instructions, and produce output in the form of 0s and 1s.

• The voltage on the line at the time a signal is sent determines whether the signal is a 0 or a 1.

• On a 3.3-volt system, an application of 3.3 volts means that it is a 1, while an application of 0 volts means it's a 0.

The CPU- The Real Computer

CPU (Central Processing Unit)= A complex collection of electronic circuits on one or more integrated circuits (chips) which:

1. Executes the instructions in a software program

2. Communicates with other parts of the computer system, especially RAM

The CPU is the computer!

Some of the parts of the CPU

Arithmetic Logic Unit (ALU) = area of the CPU responsible for the actual processing “The CPU’s calculator”

Control Unit (CU) = area of the CPU responsible for getting data and instructions from RAM

A CPU can be:

1. A series of integrated circuits (chips) on one or more circuit boards

– Older mainframe and minicomputers

2. On a single integrated circuit known as a microprocessor

microprocessor = a CPU on a single chip

microcomputer = older term for a computer with a microprocessor(s) (PC, Macintosh

The Microprocessor

Compatibility
Why can’t I run Windows software on my Macintosh and visa versa?

• Operating system software is designed to run on one specific type of CPU or “family of CPUs”

• Application software is designed to work with a specific operating system software, thus one specific type of CPU or “family of CPUs”

More “later”

Power of the CPU

1. The number of bits processed

2. The size of the CPUs data bus

3. The math coprocessor

4. Multiprocessing capabilities

5. Virtual Memory capabilities

6. The Speed of the CPU

7. Internal Cache capabilities

1. The number of bits processed

Early microprocessors:

• 4 bit and 8 bit processors

• Intel 8088, 80286: 16 bit processors

• Intel 80386, 80486, Pentium: 32 bit processors

• Motorola (Apple) 68020, 30, 40 and the PowerPC: 32 bit processors

Current processors

• 32 bit processors

Latest:

• 64 & 128 bit processors

Pentium III

Pentium 4

AMD Processors (continued)

VIA C3 Processor

64-Bit Processors

• Intel Itaniums

• AMD 64-bit processors

The Itanium 2 Processor

AMD 64-Bit Processors

Combination Heat Sink and Cooling Fan

2. The CPU’s Data Bus

The CPU’s Data Bus

Data bus = the number or wires between the CPU and RAM

More wires (lanes) the faster the CPU gets the data and software to process

Older CPUs: 8 and 16 bit data bus

Newer CPUs: 32 and 64 bit data bus

3. The Amount of RAM the CPU can Recognize

• CPUs are designed to be able to recognize a specific amount of RAM memory

• Today’s microprocessors recognize 4 GB of RAM,

• However Motherboards support less, about 2 GB

• Earlier Microprocessors

– Intel 8088 -> 1 MB RAM

– Intel 80286 -> 16 MB RAM

– Intel 80386 & Early Pentiums -> 4 GB RAM

4. The Math Co-processor or FPU (Legacy

For math intensive applications

• Large spreadsheets

• Graphics

• Animation and video

• CAD (Computer Aided Design)

Early microcomputers

• separate Math Co-processor

Later microprocessors

• built-into the CPU

• faster when inside the chip

5. Multiprocessing Abilities

Multiprocessing = ability of the CPU to process more than one task at a time

Example: Sorting a datafile and calculating a spreadsheet at the same time

All new microprocessors can do multiprocessing

6. The Speed of the CPU

Speed measured in

• Megahertz (MHz) - the number of millions of beats per second

• Gigahertz (GHz) - the number of billions of beats per second

Examples:

• Early CPUs: 4 - 33 MHz

• Current Processors: 3 GHz and more

Faster the CPU, faster the processing

7. Internal Cache

Internal Cache = memory inside the CPU chip which stores instructions and data which the CPU is currently working on or may soon need.

• The CPU must deliver its data at a very high speed.

• The regular RAM cannot keep up with that speed.

• Therefore, a special RAM type called cache is used as a buffer - temporary storage.

• L1 Cache – Same chip as CPU (fastest)

• L2 Cache – Separate chip

Inside the CPU

• The computer can only do one thing at a time.

• Each action must be broken down into the most basic steps.

• One round of steps from getting an instruction back to getting the next instruction is called the Machine Cycle.

The Machine Cycle

• Fetch - get an instruction from Main Memory

• Decode - translate it into computer commands

• Execute - actually process the command

• Store - write the result to Main Memory

For example, to add the numbers 5 and 6 and show the answer on the screen requires the following steps:

1. Fetch instruction: "Get number at an address in memory nnnn"

2. Decode instruction.

3. Execute: ALU finds the number. (which happens to be 5)

4. Store: The number 5 is stored in a temporary spot in Main Memory.

5. Repeat steps for another number (= 6)

9. Fetch instruction: "Add those two numbers"

10. Decode instruction.

11. Execute: ALU adds the numbers.

12. Store: The answer is stored in a temporary spot.

13. Fetch instruction: "Display answer on screen."

14. Decode instruction.

15. Execute: Display answer on screen.

The immense speed of the computer enables it to do millions of such steps in a second.

In fact, MIPS, standing for millions of instructions per second, is one way to measure computer speeds.

Apple G5

• G5 drives the largest performance gain in the history of the PowerPC.

• The 64-bit G5 offers speeds up to 2.5GHz and can address up to 8GB of main memory.

CPU operation

The fundamental operation of most CPUs, regardless of the physical form they take, is to execute a sequence of stored instructions called a program. The program is represented by a series of numbers that are kept in some kind of computer memory. There are four steps : fetch, decode, execute, and write back. The first step, fetch, involves retrieving an instruction from program memory. The instruction that the CPU fetches from memory is used to determine what the CPU is to do. In the decode step, the instruction is broken up into parts that have significance to other portions of the CPU.

Often, one group of numbers in the instruction, called the opcode, indicates which operation to perform. The remaining parts of the number usually provide information required for that instruction, such as operands for an addition operation. The execute step is performed. During this step, various portions of the CPU are connected so they can perform the desired operation. If, for instance, an addition operation was requested, an arithmetic logic unit (ALU) will be connected to a set of inputs and a set of outputs. The final step, writeback, simply "writes back" the results of the execute step to some form of memory. After the execution of the instruction and writeback of the resulting data, the entire process repeats, with the next instruction cycle normally fetching the next-in-sequence instruction because of the incremented value in the program counter.

Clock rate

Most CPUs, and indeed most sequential logic devices, are synchronous in nature. That is, they are designed and operate on assumptions about a synchronization signal. This signal, known as a clock signal, usually takes the form of a periodic square wave. By calculating the maximum time that electrical signals can move in various branches of a CPU's many circuits, the designers can select an appropriate period for the clock signal.

Summary about CPU performance

• MOST OBVIOUS: Processor Clock Frequency

• Increased frequency – increased execution rate

• State of the Art: >2GHz (Jan 2002)

• Memory and I/O access times can be performance bottleneck – unless you take some special measures

• ALU register width

– A processor is an n-bit processor, where N represents the precision of the ALU – N can be 4, 8, 16, 32, or 64

– The wider the registers – the more processing per clock

• Data bus width

– The wider the data bus the faster we can transfer data

– Since the memory and I/O device access times are finite, the more bits transferred per cycle the better

• Address bus width

• Increased address width doesn’t provide a ‘speed’ increase as such

• CPU can directly address more memory

• PCs use big programs, which would not fit in a smaller address space

• Overcoming small address space takes time

– Impacts on overall system performance

HISTORY

Intel 8088

The Intel 8088 is an Intel microprocessor based on the 8086, with 16-bit registers and an 8-bit external data bus. It can address up to 1 MB of memory. The 8088 was introduced on July 1, 1979, and was used in the original IBM PC. The most influential microcomputer to use the 8088 was, by far, the IBM PC. The original PC processor ran at a clock frequency of 4.77 MHz . Depending on the model, the Intel 8088 ranged from 0.33 to 0.75 million instructions per second. A pin compatible replacement chip, the V20, was produced by NEC for an approximate 20 percent improvement in computing power.

Intel 8086 (1978)

It was a true 16-bit processor and talked with its cards via a 16 wire data connection. The chip contained 29,000 transistors and 20 address lines that gave it the ability to talk with up to 1 MB of RAM. . The chip was available in 5, 6,, 8, and 10 MHz versions.

Intel 8088 (1979)

The only difference is that it handles its address lines differently than the 8086. This chip was the one that was chosen for the first IBM PC, and like the 8086, it is able to work with the 8087 math coprocessor chip

8086/8088 Functional Units

8086/8088 (3)

•8086/8088 consists of two internal units

–The execution unit (EU) - executes the instructions

–The bus interface unit (BIU) - fetches instructions, reads operands and writes results

•The 8086 has a 6-byte prefetch queue

•The 8088 has a 4-byte prefetch queue

NEC V20 and V30 (1981)

Clones of the 8088 and 8086. They are supposed to be about 30% faster than the Intel ones, though.

8086/8088 Summary

•First Generation (introduced June 1978)

•One of the first 16-bit processors on the market

•16-bit internal registers

•16/8-bit external data bus

•20-bit address bus (1MB addressable)

•Used in 1st generation IBM PCs (1981)

Intel 80186 (1980)

The 186 was a popular chip. In 1990, Intel came out with the Enhanced 186 family. They all shared a common core design. They had a 1-micron core design and ran at about 25MHz at 3 volts. The 80186 contained a high level of integration, with the system controller, interrupt controller, DMA controller and timing circuitry right on the CPU.

2nd Generation Processor 286

•P2 (286) = 2nd Generation Processor

•Introduced in 1981

•CPU behind IBM AT

•Throughput of original IBM AT (6MHz) was about 500% of IBM PC (4.77MHz)

•Level of integration: 134k transistors (vs 29k in 8086)

•Still a 16-bit processor…

•Available in higher clock frequencies: 25MHz

2nd Generation Processors 286

•Fully backwards compatible to 8086
80286 runs 8086 software without modification

•Improved instruction execution
Average instruction takes 4.5 cycles vs. 12 cycles (8086)

•Improved instruction set

•Real mode and Protected Mode
Multitasking-support. What happens in one area of memory doesn’t affect other programs. Protected mode supported by Windows 3.0.

•16MB addressable physical memory

•On-chip MMU (1GB virtual memory)

•Non-multiplexed address-bus and data-bus

Intel 80286 (1982)

A 16-bit, 134,000 transistor processor capable of addressing up to 16 MB of RAM. In addition to the increased physical memory support, this chip is able to work with virtual memory, thereby allowing much for expandability. The 286 was the first “real” processor. It introduced the concept of protected mode. This is the ability to multitask, having different programs run separately but at the same time. On the drawbacks of this ability, though, was that while it could switch from real mode to protected mode , it could not switch back to real mode without a warm reboot. This chip was used by IBM in its Advanced Technology PC/AT and was used in a lot of IBM-compatibles. It ran at 8, 10, and 12.5 MHz, but later editions of the chip ran as high as

3rd Generation Processor 386

•P3 (386) = 3rd Generation Processor

•Introduced: 10/1985

•Full 32-bit processor
(32-bit registers. 32-bit internal and external databus. 32-bit address bus)

•275k transistors. CMOS. 132-pin PGA package.
(Supply current Icc=400mA. Roughly the same as 8086 !)

•Clock speeds: 16-33MHz

•P3 processors were far ahead of their time:
It took 10 years before 32-bit operating systems became mainstream!

•First 386 PCs early 1987
(COMPAQ)

3rd Generation Processor 386

•Modes of operation:

–Real. Protected. Virtual Real.

•Protected mode of 386 is fully compatible with 286
Protected mode=native mode of operation. Chips are designed for advanced operating systems such as Windows NT

•New virtual real mode
Processor can run with hardware memory protection while simulating the 8086’s real-mode operation. Multiple copies of e.g. DOS can run simultaneously, each in a protected area of memory. If a program in one memory area crashes, the rest of the system is protected.

80386 Operating Modes

•Protected Mode for Multitasking support

•Real Mode (native 8086 mode)

–Processor powers up in Real Mode

•System Management Mode

–Power management or system security

–Processor switches to separate address space, while saving the entire context of the currently running program or task

Intel 386 (1985 - 1990)

The 386 was a 32-bit processor, meaning its data throughput was immediately twice that of the 286. Containing 275,000 transistors, the 80386DX processor came in 16, 20, 25, and 33 MHz versions. The 32-bit address bus allowed the chip to work with a full 4 GB of RAM and a staggering 64 TB of virtual memory. While the chip could run in both real and protected mode , it could also run in virtual real mode, allowing several real mode sessions to be run at a time. s, though. In 1988, Intel released the 386SX, which was basically a low-fat version of the 386. It used the 16-bit data bus rather than the 32-bit, and it was slower, but it thus used less power and thus enabled Intel to promote the chip into desktops and even portables. In 1990, Intel released the 80386SL, which was basically an 855,00 transistor version of the 386SX processor. 386 chips were designed to be user friendly.

80386: Classic CISC Processor

•CISC = Complex Instruction Set Computer

•Complex instructions

•...but code-size efficient

•Micro-encoding of the machine instructions

•Extensive addressing capabilities for memory operations

•Few, but very useful CPU registers

80386 Complex Instructions

•CISC drawback: Most instructions are so complicated, they have to be broken into a sequence of micro-steps

•These steps are called Micro-Code

•Stored in a ROM in the processor core

•Micro-code ROM: Access-time and size...

•They require extra ROM and decode logic

RISC: Less is More

•RISC = Reduced Instruction Set Computer

•20/80 Rule: 20% of the instructions take up 80% of the time

•Sometimes executing a sequence of simple instructions runs quicker than a single complex machine instruction that has the same effect

RISC Ideas (1)

•Reduce the instruction set to simplify the decoding

–Smaller Instruction Set -> Simpler Logic -> Smaller Logic -> Faster Execution

•Eliminate microcode – hardwire all instruction execution

•Pipeline instruction decoding and executing – do more operations in parallel

Superscalar Architecture:

•The processor may have more than one pipeline (Pentium…)

•Where possible each pipeline works independently

–Not always possible

•May achieve average completed execution of more than one instruction per clock cycle

Getting the Benefits of Pipelining

•Simplified Instruction decoding

–Simpler, faster logic

•On-chip cache memories

–Local memory on-chip to avoid memory access bottlenecks

•Floating Point pipeline for FP coprocessor

•Speculative Execution to get around pipeline flushes

4th Generation Processor

80486: IA-32 with RISC elements

•Introduced 04/91

•Greatly improved 80386 CPU

•Hard-wired implementation of frequently used instructions (as in RISCs). On average 2 clock cycles/instruction.

•5 stage instruction pipeline

•Internal L1 Cache Memory (8kB) + cache controller

•On-chip Floating Point coprocessor (FPU)

•Longer Prefetch Queue (32-bytes as opposed to 16 on the 80386)

•Higher frequency operation: up to 120MHz

•>1.2M transistors, 0.8m CMOS. 168-pin PGA.

Intel 486 (1989 - 1994)

The 80486DX was a 32-bit processor containing 1.2 million transistors. It had the same memory capacity as the 386 (both were 32-bit) but offered twice the speed at 26.9 million instructions per second (MIPS) at 33 MHz. The 486 was the first to have an integrated floating point unit (FPU) to replace the normally separate math coprocessor (not all flavors of the 486 had this, though). It also contained an integrated 8 KB on-die cache. This increases speed by using the instruction pipelining to predict the next instructions and then storing them in the cache. Also, the 486 came in 5 volt and 3 volt0 versions, allowing flexibility for desktops and laptops.The memberS of 486 family were i486DX, 486SX ,486DX/50,i486DX2/50,i486DX2/66. Also in 1992, Intel put out the 486SL. it contained 1.4 million transistors.

The Pentium Pro (1995-1999

The Pentium Pro (also called “P6″ or “PPro”) is a RISC chip with a 486 hardware emulator on it, running at 200 MHz or below. Several techniques are used by this chip to produce more performance than its predecessors. Increased speed is achieved by dividing processing into more stages, and more work is done within each clock cycle. Three instructions can be decoded in each clock cycle, as opposed to only two for the Pentium. It has two separate 8K L1 cache (one for data and one for instructions), and up to 1 MB of onboard L2 cache in the same package. the onboard L2 cache increased performance in and of itself because the chip did not have to make use of an L2 cache on the motherboard itself. PPro is optimized for 32-bit code, so it will run 16-bit code no faster than a Pentium, which is a big drawback.

5th Gen. Processor: Pentium

•Pentium = P5 (586) = 5th Generation Processor
(trademarking a number designation not possible)

•Introduced: 03/1993
(Pentium-PCs followed a few months later)

•Superscalar technology
(2 instruction pipelines for execution of up to 2 instructions per clock cycle)

•Branch prediction
(to avoid flushing the instruction queue and pipeline at branch-taken event)

•Internal 8kB caches for code and data
(but external L2 cache)

•Addressbus: 32b. External Databus: 64b
But not a 64-bit processor! Internal data paths up to 256b wide

5th Gen. Processor: Pentium

•Pipelined FPU
(2..10 times faster than 486 FPU. FDIV bug! Free replacement…)
962,306,957,033 / 11,010,046 = 87,402.6282027341 (correct answer)
962,306,957,033 / 11,010,046 = 87,399.5805831329 (flawed Pentium)

•Burst-mode bus cycles
(fast data transfer from memory to cache)

•>3M transistors. BiCMOS. 0.8m..0.35m.

•Supply voltages: 5V..2.9V

•Packages: PGA273 and SPGA296
(up to 16W power dissipation! Forced-convection cooling: fan)

5th Gen. Processor: Pentium

•Clock speeds: 60-266MHz

•Clock multiplier circuitry
Processor runs faster than the system bus. Motherboard bus speeds 50, 60, 66MHz.

•System management mode (SMM)
(full control over power management features)

P5 Evolution: Pentium MMX

•Pentium P5 with MMX Extensions

•Introduced: 01/1997

•D-bus: 64b. A-bus: 32b

•Vcc: 1.8V-2.8V

•66-266MHz

•L1-caches: 16kB code and data (write-back). 4-way set associative. More write buffers.

•4.5M transistors. 0.25/0.35m BiCMOS.

•321-pin socket 7

P5 Evolution: Pentium MMX

•MMX

–MMX = Multi-media Extensions
To meet growing importance and increasing demands of multi-media and communication applications

–57 new instructions
New instructions designed specifically to handle video and audio data

–SIMD = Single Instruction Multiple Data
One instruction performs the same function on many pieces of data

–MMX is pipelined

6th Gen. Processor: P6

•P6 Processor Variations:

–Pentium Pro
Original P6 processor. L2 cache: 256kB, 512kB or 1MB (full-core speed)

–Pentium II
P6 with L2-cache: 512kB (half-core speed)

–Pentium II Xeon
P6 with L2-cache: 512kB/1MB/2MB (full-core speed)

–Celeron
P6 without L2 cache

–Celeron-A
P6 with L2-cache: 128kB on-die (full-core speed)

–Pentium III
P6 with SSE (MMX2), L2-cache: 256kB on-die (half-core speed)

–Pentium III Xeon
P6 with SSE (MMX2), L2-cache: 512kB/1MB/2MB on-die (full-core speed)

P6: Main New Features...

•Other new features:

–A few new instructions

–Enhanced multi-processor support

•Only recent Windows Versions (NT/2000/XP) do take full advantage of the P6’s capabilities

•Use optimising compilers

–to make code as “predictable” as possible

P6: Pentium Pro

•Introduced: 11/1995
(before P5 MMX)

•Outstanding feature:
Integrated L2 cache

•Multi-chip module (MCM)
Dual-cavity PGA

•2 silicon dies:
Processor & L2 cache (256kB, 512kB, 1MB)
5.5M + 63M = 68M transistors

•Packaging = extremely expensive !

P6: Pentium II

•Introduced: 05/1997

•Abandoned: chip-in-a-socket

•Introduced: 242-pin SEC cartridge

•Much less expensive to manufacture
(at the time!)

P6: Pentium II

•Processor core speeds: 233-450MHz

•Bus speeds: 66-100MHz

•7.5M transistors. 0.25/0.35m BiCMOS.

•MMX

•Power dissipation up to >40W!
Heatsinks and fans required!

•A-bus: 36b
Addressable: 64GB

•L2 cache
Half core-speed.
Supports up to 512MB

P6: Celeron

•Cheaper packaging (SEP)
No fancy plastic cartridge

•Specifically designed for lower-cost PCs

•L2 cache support up to 4GB of RAM

•MMX

•L1 cache: 2* 16kB

•Integral thermal diode for temperature monitoring

•0.25/0.18m technology

P6: Pentium III

•Introduced: 02/1999

•28M transistors

•0.18m coppermine technology
Interconnect: Copper rather than Aluminium/Tungsten to reduce signal diffusion…

•Major improvements:

–SSE (Streaming SIMD Extensions)

–Integrated on-die L2 cache

•Available up to 1GHz

•

7th Gen. Processor: Pentium 4

•Introduced: 11/2000. Also called “NetBurst”

•Main technical details:

–Core speed range 1.3GHz..3GHz…?

–42M transistors. 0.18m.

–System (front-side) bus: up to 400MHz

–ALU runs at twice the processor core frequency

–Hyper-pipelined 20-stage technology

–Very deep out-of-order instruction execution

–20kB L1 cache. 256kB full-speed L2-cache. 8-way set associative. L2 supports up to 4GB RAM and ECC.

–SSE2 – 144 new SSE2 instructions

–Socket 432. Up to 64W of power dissipation.

Pentium II (1997)

Intel made some major changes to the processor scene with the release of the Pentium II. They had the PentiumMMX and Pentium Pro’s out into the market in a strong way, and they wanted to bring the best of both into one chip. . Pentium II is optimized for 32-bit applications. It also contains the MMX instruction set, which is almost a standard by this time. The chip uses the dynamic execution technology of the Pentium Pro, allowing the processor to predict coming instructions, accelerating work flow.. Pentium II has 32KB of L1 cache (16KB each for data and instructions) and has a 512KB of L2 cache on package. The L2 cache runs at ½ the speed of the processor, not at full speed. Nonetheless, the fact that the L2 cache is not on the motherboard, but instead in the chip itself, boosts performance.. Pentium Pro’s use Socket 8. Pentium II, however, makes use of “Slot 1″. The package-type of the P2 is called Single-Edge contact (SEC). The chip and L2 cache actually reside on a card which attaches to the motherboard via a slot, much like an expansion card. The entire P2 package is surrounded by a plastic cartridge. .

Celeron (1998)

The Celeron is very cheap, Intel removed the L2 cache from the Pentium II. They also removed the support for dual processors, an ability that the Pentium II had. Additionally, they ditched the plastic cover which the P2 had, leaving simply the processor on the Slot 1 style card. This, no doubt, reduced the cost of the processor quite a bit, but performance suffered noticeably. Removing the L2 cache from a chip seriously hampers its performance. On top of that, the chip was still limited to the 66MHz system bus.Intel had realized their mistake with the next edition of the Celeron, the Celeron 300A. The 300A came with 128KB of L2 cache on board. The Celeron is available in two formats. The original Celerons used the patented Slot 1 interface. But, Intel later switched over to a PPGA format, or Plastic Pin Grid Array, also known as Socket 370. . Slot 1 Celerons ranged from the original 233MHz up to 433 MHz, while Celerons 300MHz and up were available in Socket 370.s

Pentium III (1999)

also known as KATMAI running at 450 MHz on a 100MHz bus. It introduced the SSE instruction set, which was basically an extension of MMX that again improved the performance on 3D apps designed to use the new ability. SSE contained 70 new instructions, with four simultaneous instructions able to be performed simultaneously. In April of 2000, Intel released their Pentium III Coppermine. While Katmai had 512 KB of L2 cache, Coppermine had half that at only 256 KB. But, the cache was located directly on the CPU core rather than on the daughtercard as typified in previous Slot 1 processors.. Coppermine also supported the 133 MHz front side bus. Coppermine proved to be a performance chip and it was and still is used by many PCs. Coppermine eventually saw 1+ GHz.

Celeron II (2000)

The Celeron II is simply a Celeron with a SSE, SSE2, and a few added features. The chip is available from 533 MHz to 1.1 GHz. This chip was basically an enhancement of the original Celeron, and it was released in response to AMD’s coming competition in the low-cost market with the Duron. Due to some inefficiencies in the L2 cache and still using the 66MHz bus this chip would not hold up too well against the Duron despite being based on the trusted Coppermine core. Celeron II would not be released with true 100 MHz bus support until the 800MHz edition, which was put out at the beginning of 2001.

Pentium IV (2000)

While we have been talking about AMD’s high-speed Athlon Thunderbirds and Palominos, Intel actually beat AMD to the gun by releasing Pentium IV Willamette in November of 2000. Pentium IV was exactly what Intel needed to again take the torch from AMD. Pentium IV is a truly new CPU architecture and serves as the beginning to new technologies we will see for the next several years. The new NetBurst architecture is designed with future speed increase in mind, meaning P4 is not going to fade away quickly like Pentium III near the 1 GHz mark.

According to Intel, NetBurst is made up of four new technologies: Hyper Pipelined Technology, Rapid Execution Engine, Execution Trace Cache and a 400MHz system bus

The difference between Core 2 Duo and Core Duo (Dual Core)

Dual core is simply a generic term referring to any processor package with two physical CPUs in one.

The Pentium D is simply two Pentium 4 Prescott cpus inefficiently paired together and ran as dual core.

The Core Duo is Intel's first generation dual core processor based upon the Pentium M (a Pentium III-4 hybrid) made mostly for laptops (though a few motherboard manufacturers have released desktop boards supporting the Core Duo CPU), and is much more efficiently than Pentium D.

The Core 2 Duo is Intel's second generation (hence, Core 2) processor made for desktops and laptops designed from the ground up to be fast while not consuming nearly as much power as previous CPUs.

The Pentium D, Core Duo, Core 2 Duo and Athlon X2 are all current CPUs that have dual cores in one package.

Note - Intel has dropped the Pentium name in favor of the Core architecture.

Intel Core 2

The Core 2 brand was introduced on July 27, 2006[3] comprising the Solo (single-core), Duo (dual-core), Quad (quad-core), and Extreme (dual- or quad-core CPUs for enthusiasts) branches, during 2007.[4] Intel Core 2 processors with vPro technology (designed for businesses) include the dual-core and quad-core branches.[5

Duo, Quad, and Extreme

The Core 2-branded CPUs include: "Conroe" and "Allendale" (dual-core for higher- and lower-end desktops), "Merom" (dual-core for laptops), "Kentsfield" (quad-core for desktops), and their variants named "Penryn" (dual-core for laptops), "Wolfdale" (dual-core for desktops) and "Yorkfield" (quad-core for desktops). (Note: For the server and workstation "Woodcrest", "Clovertown", and "Tigerton" CPUs see the Xeon brand[6].)

The Core 2 branded processors featured the Virtualization Technology (except T52x0, T5300, T54x0, T55x0 with stepping "B2", E2xx0, E4x00 and E8190 models), Execute Disable Bit, and SSE3. Their Core microarchitecture introduced also SSSE3, Trusted Execution Technology, Enhanced SpeedStep, and Active Management Technology (iAMT2). With a Thermal Design Power (TDP) of up to only 65 W, the Core 2 dual-core Conroe consumed only half the power of less capable, but also dual-core Pentium D-branded desktop chips[7] with a TDP of up to 130 W[8] (a high TDP requires additional cooling that can be noisy or expensive).

CISC, RISC, EPIC & VLIW

•CISC : Complex Instruction Set Computer.

• CISC chips have a large amount of different and complex instructions.

• In common CISC chips are relatively slow compared to RISC chips per instruction, but use less than RISC instructions.

•RISC : Reduced Instruction Set Computer.

• RISC chips evolved around the mid-1980 as a reaction at CISC chips.

• Advantage of RISC is that because of simple instructions

• RISC chips require fewer transistors, which makes them easier to design and cheaper to produce.

•EPIC : Explicitly Parallel Instruction Computing.

• EPIC can execute many instruction in parallel.

• EPIC is created by Intel and is in a way a combination of both CISC and RISC.

• This will in theory allow the processing of Windows-based as well as UNIX-based applications by the same CPU.

• Microsoft developed their Win64 standard for it. EPIC is a 64-bit chip.

•VLIW : Very Long Instruction Word.

• The VLIW processor uses instructions that are long.

• The idea is to put many instructions together in one.

• Then the processor can fetch several instructions in one operation and be more efficient.

Basics Monitor Operation, Other Considerations in Choosing Monitors, Power saving feature, Flat panel displays, Flat panel and CRT monitor comparison, How flat panel work, Emerging flat panel technologies, LCD technologies and Comparision, Installing and Maintaining FPD, Commonly Occurring Problems and Solutions

Lab: Monitor Demo.

Introduction:-

Before CRT monitors came into general use, the teletypewriter was the standard computer interface large, loud device that printed the input and output characters on a roll of paper.
The first CRT displays used on computers were primitive by today's standards; they displayed only text in a single color (usually green)
Over time, color displays were introduced, screen sizes increased, and LCD technologies moved from the portable computer to the desktop
The latest trends, large-screen plasma displays and LCD/DLP (Digital light processing ) projectors, reflect the increasing convergence of entertainment.

WORKING OF CRT MONITOR

The most popular technology used in the monitor is the (CRT) Cathode Ray Tube. The CRT consists of vacuumed tube enclosed in glass. One end consist of electron gun assembly that projects three electron beam RED, GREEN and BLUE this is to create colors on the screen, other end contains a screen with a phosphorous coating. When heated the electron gun emits stream of high-speed electrons that are attracted to other end of the tube. Along the way, a focus control and deflection coil steer the beam to a specific point on the phosphorus screen. When stuck by the beam the phosphor glows. This light is what when you watch the monitor screen. Three layers of phosphor is used RED, GREEN and BLUE. A metal plate called shadow mask is used to align the electron beams. It has slots or holes that divide the red, green and blue phosphor into groups of three. Various types affect the picture quality and the distance between each affects the picture sharpness.

Screen Resolution - measure of number of pixels on a screen (m by n)

–m - Horizontal screen resolution

–n - Vertical screen resolution

Pixel - The most basic addressable image element in a screen

–CRT - Color triad (RGB phosphor dots)

–LCD - Single color element

Scanning

VERTICAL SYNC PULSE — Signals the start of the next field.

VERTICAL RETRACE — Time needed to get from the bottom of the current field to the top of the next field.

HORIZONTAL SYNC PULSE — Signals the start of the new scan line.

HORIZONTAL RETRACE — Time needed to get from the end of the current scan line to the start of the next scan

Liquid Crystal Displays
Liquid crystal displays use small flat chips which change their transparency properties when a voltage is applied.

LCD elements are arranged in an n x m array call the LCD matrix

Level of voltage controls gray levels.

LCDs elements do not emit light, use backlights behind the LCD matrix

Comparison between active matrix and passie matrix monitor:-

Passive LCD screens

–Cycle through each element of the LCD matrix applying the voltage required for that element.

–Once aligned with the electric field the molecules in the LCD will hold their alignment for a short time

Active LCD screens

–Each element contains a small transistor that maintains the voltage until the next refresh cycle.

–Higher contrast and much faster response than passive LCD

Advantages of LCDs

Flat

Lightweight

Low power consumption

CRT Versus LCD Displays

Advantages of CRT monitor over LCD

· Widest viewing angle without color distortion

· Lower initial cost

· Resolution flexibility

· Response time

Monitor Selection Criteria

Important factors to consider include

· Viewable image size

· Resolution

· Dot pitch (CRTs)

· Image brightness and contrast (LCDs)

· Power management and safety certifications

· Vertical and horizontal frequencies

· Picture controls

· Environmental issues (lighting, size, weight)

How LCD Displays Work

In an LCD, a polarizing filter creates two separate light waves. The polarizing filter allows light waves that are aligned only with the filter to pass through. After passing through the polarizing filter, the remaining light waves are all aligned in the same direction. By aligning a second polarizing filter at a right angle to the first, all those waves are blocked. By changing the angle of the second polarizing filter, the amount of light allowed to pass can be changed. It is the role of the liquid crystal cell to change the angle of polarization and control the amount of light that passes. The liquid crystals are rod-shaped molecules that flow like a liquid. They enable light to pass straight through, but an electrical charge alters their orientations and the orientation of light passing through them. Although monochrome LCDs do not have color filters, they can have multiple cells per pixel for controlling shades of gray.

In a color LCD, an additional filter has three cells for each pixel one each for displaying red, green, and blue with a corresponding transistor for each cell. The red, green, and blue cells that make up a pixel are sometimes referred to as sub-pixels. The ability to control each cell individually has enabled Microsoft to develop a new method of improving LCD text quality. Beginning with Windows XP, you can enable a feature called Clear Type through the Display properties sheet. Clear Type can dramatically improve the legibility of text onscreen and further reduce eye strain from extended PC use. However, the downside to this technology is that individual cells can fail.

Active-Matrix Displays

LCD panels use a type of active-matrix technology known as a thin film transistor (TFT) array. TFT is a method for packaging from one (monochrome) to three (RGB color) transistors per pixel within a flexible material that is the same size and shape as the display. Therefore, the transistors for each pixel lie directly behind the liquid crystal cells they control.

Passive matrix displays

In this type of displays there are 2 rows of transistors, one at the top and the other at the bottom side. Computer sends signals to the x and y coordinates transistors for the pixels and thus turning them on.

Plasma Displays

Plasma, the latest technology for large wide-screen displays, actually has a long history. In the late 1980s, IBM developed a monochrome plasma screen that displayed orange text and graphics on a black background. Toshiba used this display in its T3100 and T3200 laptop computers, which featured double-scan CGA/AT&T 6300-compatible 640x400 graphics.

Unlike the early IBM monochrome plasma screen, today's plasma displays are RGB devices capable of displaying 24-bit or 32-bit color, TV, or DVD signals. Plasma screens produce an image by using electrically charged gas (plasma) to illuminate triads of red, green, and blue phosphors, as shown in Figure 13.7.

Figure 13.7. A cross-section of a typical plasma display.

The display and address electrodes create a grid that enables each sub pixel to be individually addressed. By adjusting the differences in charge between the display and address electrodes for each triad's sub pixels, the signal source controls the picture.

Typical plasma screens range in size from 42" to 50" or larger. Because they are primarily designed for use with DVD, TV, or HDTV video sources, they are optimized for video rather than computer use. Typical resolutions include 852x480 or 1366x768 (Wide XGA). Note that some plasma screens can also support 1024x768 or 1280x1024 (4:3 ratio) VGA video. Given the limited resolution of plasma screens, they are best suited for entertainment rather than computer use, although some do include DVI-HDCP (DVI-D) and VGA ports for use with computer-based video.

Resolution

Number of potential pixels which a monitor is capable of displaying. The value is in horizontal and vertical no. of pixels.

Table 13.3. Graphics Display Resolution Standards
Display Standard	Linear Pixels (HxV)	Total Pixels	Aspect Ratio
CGA	320x200	64,000	1.60
EGA	640x350	224,000	1.83
VGA	640x480	307,200	1.33
WVGA	854x480	409,920	1.78
SVGA	800x600	480,000	1.33
XGA	1024x768	786,432	1.33
XGA+	1152x864	995,328	1.33
WXGA	1280x800	1,024,000	1.60
WXGA+	1440x900	1,296,000	1.60
SXGA	1280x1024s	1,310,720	1.25
SXGA+	1400x1050	1,470,000	1.33
WSXGA	1600x1024	1,638,400	1.56
WSXGA+	1680x1050	1,764,000	1.60
UXGA	1600x1200	1,920,000	1.33
HDTV	1920x1080	2,073,600	1.78
WUXGA	1920x1200	2,304,000	1.60
QXGA	2048x1536	3,145,728	1.33
QSXGA	2560x2048	5,242,880	1.25
QUXGA-W	3840x2400	9,216,000	1.60
Aspect ratios:
1.25 = 5:4
1.33 = 4:3
1.56 = 25:16
1.60 = 16:10
1.78 = 16:9
1.83 = 11:6

Figure 13.2. Conventional VGA cards, CRTs, and analog-compatible LCDs use the standard VGA connector. Early digital LCDs and their matching video cards often used the DFP connector. Most recent digital LCD panels and LCD TVs use the DVI-D (also known as the DVI-HDCP) connector, whereas video cards used with both analog and digital displays use the DVI-I connector.

Mother baord architecture

MOTHERBOARD LOGIC

Microprocessor:-

Microprocessor, even though it is the largest chip available, it cannot work alone. It requires memory to work. The communication between microprocessor and memory is with copper wires which are running in parallel. This parallel wires are called buses. There are three types of buses, namely 1. Data bus 2. Address bus and 3. Control bus.

Microprocessor contains two sections. Execution unit and Bus interface unit. All the bus related external activities are done by Bus Interface Unit and internal arithmetical and logical operations are done by Execution unit. The BIU fetches instruction in advance and stores them in instruction queue. The execution unit takes instructions from the instruction queue ad then executes them. Whenever EU needs to communicate with external memory or I/O devices, it requests BIU to do it. The BIU performs memory bus cycle or I/O bus cycles for this purpose.

Bus cycles contains minimum of four bus cycles.

T1 state = Address generation

T2 state = Memory read

T3 state = Microprocessor ready

T4 state = Data transfer

An example of memory read bus cycle is shown in the figure above. It contains 4 time states. In case microprocessor is not ready or memory is not able to release data on time, there is a delay introduced in the bus cycle called wait state. A reasonable good delay, may suspend the operation and this is called hanging.

Clock generator:-

Clock generator performs three functions. Viz. 1. Generating system clock

Generating ready signal
Generating reset signal.

Clock logic – The clock is a timing pulse for the microprocessor, co-processor, bus controller etc. the frequency of this signal is 1/3 rd of the frequency of crystal.

Ready logic – it generates the ready signal for the microprocessor to introduce wait states. If ready is low, microprocessor enters in to wait state.

Reset logic – It generates a reset signal for the microprocessor. Mainly two inputs are given to this logic. Namely 1. PG from SMPS and 2. Reset button signal.

Bus controller (8288):-

Its main function is to generate the control signals necessary for interfacing the 8088 with memory or I/O subsystem. Its main functions are:-

Generate ALE signal to control address latch.
Generating DT/R and data enable signal to control data bus.
Generating read / write control signals.

These control signals are responsible for controlling various hardware connected, the address bus and data bus.

Interrupt controller(8259):-

Programmable interrupt controller (PIC), is a programmable chip to handle maskable interrupts. Each 8259 chip handles 8 interrupts. 8259 can be cascaded to extend up to 256 levels of interrupts. The functions of 8259 are grouped into four.

Sent the interrupt request and generates the INTR signal which is fed to the microprocessor.
Determine priority when more than one interrupt exists.
Present vector code of most prioritized IRQ to the microprocessor.
Ignore certain interrupt requests according to interrupt mask pattern, which is obtained from the microprocessor.

Programmable interval timer(8253):-

It has got 3 multi purpose programmable timers. The main function of 8253 is to generate accurate timing pulses under software control by the use of hardware and software. Timer channel zero is programmed to produce a 15 ms signal. This signal is used to set the time of day ligic. Timer channel one is programmed to produce a 15 micro seconds delay puse. This pulse is used for refreshing dynamic ram. Timer channel 2 is used for system speaker and it is used for producing various error and status beeps.

Programmable peripheral interface(PPI):-

It is a multi purpose programmable I/O device used for interfacing several types of peripherals to the microprocessor. It has 24 input out put pins which can be separately programmed. It can also grouped into 3 sets of 8 bits ports named as port A, Port B, and

Port C.

Programmable Direct Memory Access controller (DMA):-

It is a programmable IC with 4 independent DMA channel. By cascading additional 8237 we can get additional channels.

74ls245 (Data transceiver):-

It is a bi-directional interfacing chip used in data bus to allow bi-directional data flow.

74ls373 (Address latch):-

This chip is used address bus for latching the address signals present in the multiplexed address / data buse ALE is a control pulse used for controlling the address.

PRINTERS

Construction of a Dot matrix printer

Mechanical assembly

• Carriage guide rods

• Head carriage unit

• Timing belt

• Platen roller

• Line feed motor

• Ribbon dive mechanism

• Friction controller

• Head gap adjustment lever

Logic board

• CPU

• Slave CPU

• Master Rom

• CG-ROM

• RAM

• Decoder

• Print head firing circuit

• Carriage motor driver section

Sensors

Home position sensor – To sense the initial position of Head carriage.
Paper out sensor – To sense whether the paper is present or not.
Paper feed mode sensor – To sense the pin mode or friction mode.
Thermal sensor for head – To sense the head temperature.
Cover sensor – To sense whether the to cover is closed or not

Mechanical assembly

The head assembly:- has a set of coils inside, the head moves in horizontal

direction from left to right and back. signals are sent through flat cable.

Carriage guide Rods:- This unit carries the print head on it. This rod guides the print for its horizontal movement.

Head Carriage Unit:- This is head actuator. This is a stepper motor, which can be driven giving pulses. For each pulse, the head will move one step.

Timing Belt

This belt is fixed to motor and head carriage unit. This belt is used for

converting the rotational motion of the motor into linear motion.

Platen Roller

This roller is provided to move the paper in vertical direction. Platen roller is

made out of vulcanized rubber. The friction between the roller and the paper

enhances movement of the paper in the vertical direction.

Line Feed Motor

This motor rotates the platen roller through a gear assembly. It is a stepper motor ,which is driven by four pulses and moves in steps according to the sequence of the pulses given to

Ribbon drive Mechanism

The ribbon is present in between the head and the paper. As the

head moves, the ribbon is also rotated. A set of gear arrangement

rotates the ribbon in one direction ensuring that the print head does

not strike the ribbon on the same point.

Friction Control Lever

This lever controls the friction between Paper and Platen roller.

Head Gap Adjustment Lever

This lever is provided to accommodate more paper

CPU

The CPU is the main IC that controls all the operation of the printer. It

executes the instruction stored in the master ROM and it controls the

data flow between the PC and Printer.

Slave CPU

This is optional and is provided to assist the main CPU for carriage

motor control.

Master Rom

This IC contains the instruction for self-test and general operation of

the printer.

Character Generation Rom(CG-ROM)

This IC contains the image of each character. The PC sends data in ASCII form and the printer CPU refers the CG-ROM to converts the ASCII code to printable character.

RAM

This is the temporary memory present on the logic board used as a buffer

for receiving data from the PC. The ram is useful because the printer

cannot receive data as fast as they are being sent by the PC.

Decoder

The decoder is used for providing select signal to different IC’s to enable

them one at a time by the CPU controls the decoder.

The Head Pin firing Circuit

This circuit controls the firing of the pins present in the print head.

Componenets of Inket printer

Working Of Inkjet Printer

These printers have a moving print head on which ink cartridge is attached. Inside the ink cartridge, there are small chambers. At the top of each chamber is a metal plate and tube leading to the ink supply. At the bottom of the ink chamber there is a small ink hole. These pinholes are used to spray ink on the paper to form images as patterns of dots. An electric signal is sent to the metal plate to energies it. The plate gets heated and causes the ink to vaporize. Because of the expansion of the ink vapor, the ink is pushed out of the pinhole and forms a bubble of ink. As the vapor expands, the bubble gets large enough to break off into droplet. The rest of the ink is pulled back into the chamber by the surface tension of the ink. In this manner the drops of ink sprayed on the paper.

Working of Laser Printer

A laser printer is a non-impact printer and it is working under the principle of electro photography imaging with a laser beam. As shown in the figure, a laser beam is modulated with aquesto optical shutter, which turns the beam on and off with electronic control. The modulated light beam is then channeled to a rotating polygonal mirror. The laser beam is then focused by a lense to the surface of image drum. Image drum is coated with photo conductive material (Cadmium Sulphide). The image drum is charged to -600 volts by a electrostatic voltage and then parts of it are exposed to laser light.

The electrostatic charge directly below the light beam bleeds down to inner drum potential by photoconduction. This forms an image of charge on the image drum. The polygonal mirror rotates continuously making repeated scan. While

image drum rotates slowly. So, there occurs a raster of lines on the image drum. Charged (- 600v) fine granular toner particles are then applied on the image drum. Toner sticks to the opposite charge on the image drum. Plane paper is then charged (+600v) opposite to the toner charge and then fed under the image drum. The toner image transfers to the paper due to the high opposite charge on the paper. The paper then sent to the fuser unit and image is fused on the paper.

TROUBLE SHOOTING

Not powering on problem:-

Not powering on – power chord bad.
Not powering on – Socket problem.
Not powering on – U.P.S problem
Not powering on – SMPS switch bad
Not powering on – Direct short in mother board.
Not powering on – Add on card short.
Not powering on – Drive board short.
Not powering on – in ATX power supplies Power on/off switch bad.

Powering on, no display, no beep:-

System speaker bad – Replace it.
IDE drive cable reverse – correct the direction of signal cable.
Bad add-on card – Replace it.
Low c-mos battery – replace it with a new one.
Bios bad in mother board – Replace it
CPU loose in socket / bad – place it properly or replace it.
PG signal does not come from the SMPS – Repair / replace the SMPS.
There is no PG delay – Repair / replace the SMPS.
Mother board bad – Repair / Replace the mother board.
Reset switch short – replace it.
LED connector in reset switch connector – place it properly.

Powering on, no display, beep is there:-

Continuous long beep – memory. Either clean the edge contacts / replace the memory.
One long three short beeps – Display controller bad or loose contact.
One beep, no display – Monitor problem.
One beep, no display – Monitor power chord bad.

Powering on not booting FDD:-

FDD does not boot – FDD cable bad
FDD does not boot – power connector loose contact.
FDD does not boot – Power connector dry solder.
FDD does not boot – Signal connector dry solder.
FDD does not boot, LED glows continuously – Signal cable reverse.
FDD does not boot – FDD capacity in standard c-mos set up is different.
FDD does not boot – Under boot sequence FDD is not the first boot device.
FDD does not boot – FDC disable in integrated peripheral setup in c-mos.
FDD does not boot – FDD s bad.
FDD does not boot – Disk is not bootable or file corruption.

Powering on not booting, HDD problem:-

1. HDD not booting – IDE cable bad.

2. HDD not booting – Both the IDE devices on the same cable having the same Master / Slave configuration.

3. HDD not booting – Power connector loose contact.

4. HDD not booting – Dry solder in the power connector of the drive electronics PCB.

5. HDD not booting – Dry solder in the IDE connector in the drive electronics PCB.

6. HDD not booting – IDE controller disabled in the C-MOS setup.

7. HDD not booting – Drive configuration error in the standard C-MOS setup.

8. HDD not booting – System files missing in the HDD.

9. HDD not booting – Primary DOS partition is not active.

10. HDD not booting – Partition table corrupted.

General problems:-

C-MOS check sum failure – C-MOS battery low
No display – C-MOS battery low.
Data error reading drive – Data corruption in disk or dust accumulation on read/ write head surfaces.
Seek error reading drive A: - Dust accumulation problem in FDD head carriage shaft. Clean it with isopropyl alcohol.
Drive not ready error – Disk is not there in the drive / Index sensor bad / signal cable is bad.
FDD failure – Fdd is not properly connected / not connected to the system and it is configured in the C-MOS setup.
HDC failure – HDD bad.
Hard disk failure – Hard disk is not properly attached to he system.
Invalid boot diskette – Non-system disk in the FDD.
Key boar controller failure – Mother board to be repaired or replaced.
Non-system disk or disk error – Operating system files corrupted in the drive.
Invalid media reading drive c: - drive has been formatted.
Invalid drive – drive is not present.
Audio CD does not play – CDD audio cable, which goes to sound controller, has not been connected.

Windows based problems:-

Windows struck at the initial screen, does not boot – Himem.sys is missing.
Icons does not appear properly on the desktop – appearance setting in display settings.
Deleted items do not go to recycle bin – settings in the recycle bin properties.
Double click does not work – Arrange mouse settings in control panel.
Black and white display in color monitor. – two colour display settings in display properties.
Does not get full resolution of display – Display driver problem.
Not accepting standard serial port devices – COM port might be disabled.
No icons in the display properties – Display properties in control panel.
System very slow – Virtual memory space in HDD is not available (HDD is full).
Printer is not detected at the parallel port – Parallel port disabled in C-MOS setup.
Short cut is missing start menu – Create a short cut to the program, which is in the all programs folder.
Not getting network connection (exclamation mark fir the NIS car in the device manager) – re-install the network card driver.
Junk printout in printer – Printer cable problem.
Junk print out or printer does not work – Printer driver corrupted, re-install the driver software.
USB devices are not getting detected – USB port is disabled in C-MOS setup.
Media player is working, but there is no audio in the speaker – Audio in mute stage or the audio controller driver has not been installed properly.
No volume control icon in the task bar – control it from the control panel – sounds and audio devices.
Can not dial with modem – Modem driver corrupted, re-install it.
Invalid character while pressing a key – Language settings in the control panel, it should be US English.
Mouse does not work – cable probem
Mouse does not work – mouse controller problem.

Posted in: hw/nw

Saturday, November 19, 2011

Hardware Notes

HARDDISK DRIVE

Size

Capacity

Parts of HDD

Cylinder

Hard Drive Operation

Voice Coil Mechanism

Write Precompensation

Landing Zone

HDD interfaces

HDD Jumper settings

Some of the parts of the CPU

Introduction:-

Scanning

Comparison between active matrix and passie matrix monitor:-

Advantages of LCDs

Important factors to consider include

How LCD Displays Work

Figure 13.7. A cross-section of a typical plasma display.

Resolution

Table 13.3. Graphics Display Resolution Standards

Clock generator:-

Bus controller (8288):-

Interrupt controller(8259):-

Programmable interval timer(8253):-

Programmable peripheral interface(PPI):-

Programmable Direct Memory Access controller (DMA):-

Mechanical assembly

Master Rom

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